Is the presentation sequence of test stimuli ( including any randomisations or counter - balancing ) appropriate 研究過程中的刺激呈現(xiàn)順序和呈現(xiàn)方式是否設(shè)置的合理?
Thus , the bsc acts as the virtual test probe that carries out the test stimulus , and captures the test respondences Bsc的作用就相當(dāng)于施加測(cè)試激勵(lì)和觀察測(cè)試響應(yīng)的內(nèi)建虛擬測(cè)試探頭。
If taking programs in the memory as test stimulus , the course of testing microprocessor with at - speed current testing method can be carried out easily 若以程序作為測(cè)試激勵(lì),用全速電流測(cè)試方法檢測(cè)微處理器,實(shí)驗(yàn)過程將非常容易實(shí)現(xiàn)。
Results : the nwr was depressed by preceding intramuscular conditioning stimuli , with a degree that depended on the conditioning - test stimulus intervals and on the conditioning site 結(jié)果先用肌內(nèi)制約刺激可以抑制nwr ,抑制的程度取決于刺激的間隔和部位。
At varying conditioning - test stimulus intervals , segmental conditioning stimulus was applied in the tibialis anterior muscle ipsilateral and contralateral to the test stimulus , and heterosegmental conditioning stimulus was applied in the contralateral trapezius muscle to modulate the nwr 檢測(cè)同側(cè)和對(duì)側(cè)的脛骨前肌在刺激間隔、節(jié)段性制約刺激變化情況下的測(cè)試參數(shù)、異源節(jié)段性制約刺激作用于對(duì)側(cè)斜方肌以調(diào)整nwr 。
This structure not only achieves the purpose of hardware logic partition but also makes it convenient for the generation of test stimulus , fault simulation , and online debugging . furthermore , we make internal scan share the test access port , so the pin ’ s cost which brings for test is reduced 此外為減少芯片引腳開銷,我們還把內(nèi)部掃描和邊界掃描集成在一起,使其共用測(cè)試引腳,降低了因測(cè)試而帶來的芯片引腳開銷。
As one of the design for testability technology , boundary scan test ( bst ) fixes boundary scan cells between the device pins and core logics . thus , the bsc acts as the virtual test probe that carries out the test stimulus and captures the test response 作為一種結(jié)構(gòu)插入的可測(cè)性技術(shù),邊界掃描測(cè)試( bst )技術(shù)將邊界掃描寄存器單元安插在集成電路內(nèi)部的每個(gè)引腳上,其作用相當(dāng)于設(shè)置了施加激勵(lì)和觀測(cè)響應(yīng)的內(nèi)建虛擬探頭。
Among the many testing methods of analog and mixed signal circuits booming up in recent years , the pseudorandom testing technique is easier to generate testing stimuli and the current - based testing method could magnify the response differences between fault - free circuits and faulty circuits 近年來提出的很多種模擬及混合信號(hào)電路測(cè)試方法中,偽隨機(jī)測(cè)試法易于產(chǎn)生測(cè)試激勵(lì),基于電流的測(cè)試法能使正常電路和故障電路的頻率響應(yīng)的差別增大。
As an vxi equipment designed for testing complex data system , it wins through the shortcomings of traditional test method which uses signal generator to supply stimulus and utilizes logical analyzer to sample response data . it can achieve complicated cooperation between stimulus and response by sampling response data in the single period and then comparing it with the expectation data while imposing test stimulus on the test objective 它是為滿足復(fù)雜數(shù)字系統(tǒng)的測(cè)試需要而設(shè)計(jì)的vxi器件,克服了用數(shù)字信號(hào)發(fā)生器提供激勵(lì)并使用邏輯分析儀采集響應(yīng)數(shù)據(jù)這種傳統(tǒng)測(cè)試手段的不足,在激勵(lì)和響應(yīng)之間實(shí)現(xiàn)復(fù)雜的聯(lián)動(dòng)配合,將測(cè)試激勵(lì)施加于被測(cè)對(duì)象的同時(shí),在單周期內(nèi)采集響應(yīng)數(shù)據(jù)并與預(yù)期數(shù)據(jù)實(shí)時(shí)比較。